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SEMTECH
T oday's Results...T omorrow's Vision
Low Voltage 1:9 Differential ECL/ PECL Clock Driver
SK10LVE111 SK100LVE111
October 6, 1999
Preliminary Information
This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices.
Features
* * * * * * * * * * * 200 ps Part-to-Part Skew 50 ps Output-to-Output Skew Differential Design VBB Output Voltage and Temperature Compensated Outputs Low Voltage VEE Range of -3,0 to -3.8V 75K Internal Pulldown Resistors Fully Compatible with Motorola MC100LVE111 Specified Over Industrial Temperature Range: -40C to 85C ESD Protection of >2000V Available in 28-pin PLCC Package
Low Voltage 1:9 Differential ECL / PECL Clock Driver
28 Pin PLCC Package
Description
The SK100LVE is a low skew 1-to-9 differential driver designed with clock distribution in mind. The SK100LVE111's function and performance are similar to the SK100E111, with the added feature of low voltage operation. It accepts one signal input which can be either differential or single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. The device is specifically designed, modeled, and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device, and characterization is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met, it is necessary that both sides of the differential output are terminated into 50, even if only one side is being used. In most applications, all nine differential pairs will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side as the pair(s) being used on that side in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10-20ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin. The SK100LVE111, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the LVE111 to be used for high performance clock distribution in +3.3V systems. Designers can take advantage of the LVE111's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For systems incorporating GTL, parallel termination offers the lowest power by taking advantage of the 1.2V supply as a terminating voltage.
SEMTECH
T oday's Results...T omorrow's Vision
Low Voltage 1:9 Differential ECL/ PECL Clock Driver
SK10LVE111 SK100LVE111
Q0 Q0* Q1 Q1* Q2 Q2* Q3 Q3*
Pin IN, IN* Q0, Q0* - Q8, Q8* VBB
Function Differential Input Pair Differential Outputs VBB Output
VCC0
Q0*
Q1*
IN IN*
Q4 Q4*
VEE 26 27 28
25
24
23
22
21
20
19 18 17 16 Q3 Q3* Q4 VCC0 Q4* Q5 Q5*
Q5 Q5* Q6 Q6* Q7 Q7* Q8 Q8*
N/C IN VCC IN* VBB N/C
28 Lead PLCC
1 (Top View) 2 3 4 5 6 7 8 9 10 11 14 13 12 15
VBB
Q8
Q8*
Q7
VCC0
Q7*
Q6
Absolute Maximum Ratings (Note 3)
Symbol VEE VI IOUT TA VEE (note 4) Tstore Parameter Power Supply (VCC = 0V) Input Voltage (VCC = 0V) Output Current: Continuous Surge Operating Temperature Range Operating Range Storage Temperature Range Rating -4.5 to 0 0 to -4.0 50 100 -40 to +85 -3.8 to -3.0 -65 to +150 Unit V V mA mA
oC
Q6*
Q2*
Q0
Q1
Q2
V
oC
SEMTECH
T oday's Results...T omorrow's Vision
Low Voltage 1:9 Differential ECL/ PECL Clock Driver
SK10LVE111 SK100LVE111
SK10LVE111 ECL DC Electrical Characteristics
(VEE = VEE (min) to VEE (max); VCC = GND) (Notes 1 and 4)
TA = -40C
Symbol VOH VOL VIH VIL VBB IIH IIL IEE Characteristic Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Output Reference Voltage Input HIGH Current Input LOW Current Power Supply Current 0.5 35 65 Min -1135 -1950 -1230 -1950 -1.43 Typ Max -890 -1650 -890 -1500 -1.30 150 0.5 35 65 Min -1080 -1950 -1170 -1950 -1.38
TA = 0C
Typ Max -840 -1630 -840 -1480 -1.27 150 0.5 35
TA = +25C
Min -1020 -1950 -1130 -1950 -1.35 Typ Max -810 -1630 -810 -1480 -1.25 150 0.3 65 35 Min -910
TA = +85C
Typ Max -720 -1595 -720 -1445 -1.19 15 0 Unit mV mV mV mV V A A 65 mA
-1950 -1060 -1950 -1.31
SK10LVE111 PECL DC Electrical Characteristics
(VCC = VCC (min) to VCC (max); VEE = GND) (Notes 1 and 4)
TA = -40C
Symbol VOH VOL VIH VIL VBB IIH IIL IEE Characteristic Output HIGH Voltage7 Output LOW Voltage7 Input HIGH Voltage7 Input LOW Voltage7 Output Reference Voltage7 Input HIGH Current Input LOW Current Power Supply Current 0.5 66 Min 2165 1350 2670 1350 1.87 Typ Max 3210 1650 2410 1800 2.00 150 0.5 66 Min 2220 1350 2130 1350 1.92
TA = 0C
Typ Max 2420 1670 2460 1820 2.03 150
TA = +25C
Min 2280 1350 2170 1350 1.95 Typ Max 2490 1670 2410 1820 2.05 150 0.5 66 0.3
TA = +85C
Min 2390 1350 2240 1350 1.99 Typ Max 2580 1705 2580 1855 2.11 150 Unit mV mV mV mV V V A 66 mA
SEMTECH
T oday's Results...T omorrow's Vision
Low Voltage 1:9 Differential ECL/ PECL Clock Driver
SK10LVE111 SK100LVE111
SK100LVE111 ECL DC Electrical Characteristics
(VEE = VEE (min) to VEE (max); VCC = GND) (Notes 2 and 4)
TA = -40C
Symbol VOH VOL VIH VIL VBB VEE IIH IEE Characteristic Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Output Reference Voltage Power Supply Voltage Input HIGH Current Power Supply Current 55 Min -1.14 -1.83 -1.165 -1.810 -1.38 -3.0 Typ -1.005 -1.695 Max -0.880 -1.555 -0.880 -1.475 -1.26 -3.8 150 66 55 Min -1.08 -1.810 -1.165 -1.810 -1.38 -3.0
TA = 0C
Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 150 66
TA = +25C
Min -1.08 -1.810 -1.165 -1.810 -1.38 -3.0 Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 150 55 66
TA = +85C
Min -1.08 -1.810 -1.165 -1.810 -1.38 -3.0 Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 15 0 65 78 Unit V V V V V V A mA
SK100LVE111 PECL DC Electrical Characteristics
(VCC = VCC (min) to VCC (max); VEE = GND) (Notes 2 and 4)
TA = -40C
Symbol VOH VOL VIH VIL VBB VCC IIH I EE Characteristic Output HIGH Voltage7 Output LOW Voltage7 Input HIGH Voltage7 Input LOW Voltage7 Output Reference Voltage7 Power Supply Voltage Input HIGH Current Power Supply Current 55 Min 2.16 1.47 2.135 1.490 1.92 3.0 Typ 2.295 1.61 Max 2.420 1.75 2.420 1.825 2.04 3.8 150 66 55 Min 2.22 1.490 2.135 1.490 1.92 3.0
TA = 0C
Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 66
TA = +25C
Min 2.22 1.490 2.135 1.490 1.92 3.0 Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 55 66
TA = +85C
Min 2.22 1.490 2.135 1.490 1.92 3.0 Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 65 78 Unit V V V V V V A mA
SEMTECH
T oday's Results...T omorrow's Vision
Low Voltage 1:9 Differential ECL/ PECL Clock Driver
SK10LVE111 SK100LVE111
AC Characteristics
(VEE = VEE (min) to VEE (max); VCC = VCCO = GND) (Note 4)
-40oC Symbol Characteristic Propagation Delay to Output IN (Differential) IN (Single-Ended) Within-Device Skew Part-to-Part Skew (Diff) Minimum Input Swing Common Mode Range Rise/Fall Time 20% to 80% 500 -1.5 -0.4 Min Typ Max Min 0oC Typ Max Min 25oC Typ Max Min 85oC Typ Max Unit Cond
tPLH tPHL tskew
ps 400 350 650 700 50 250 500 -1.5 -0.4 435 385 625 675 50 250 500 -1.5 -0.4 440 390 630 680 50 250 500 -1.5 -0.4 445 395 635 685 50 250 ps 8. 9. 10. 11. 12.
VPP VCMR tr , tf
mV V
200
600
200
600
20 0
600
200
600
ps
20%-80%
1. 10LVE circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. Outputs are termionated through a 50 resistor to -2.0V. 2. The same DC parameter values apply across the full VEE range of -3.0 to -3.8V. Outputs are terminated through a 50 resistor to -2.0V. 100LVE circuits are designed to meet the DC specifications shown in the table where transverse airflow greater than 500 lfpm is maintained. 3. Absolute maximum rating, beyond which device life may be impaired unless otherwise specificed on an individual data sheet. 4. Parametric values specified at: 10LVE Series: -3.0 to -3.8V 100 LVE Series: -3.0 to -3.8V; PECL Power Supply: +3.0V to +3.8V. 5. Guaranteed HIGH signal for all inputs. 6. Guaranteed LOW signal for all inputs. 7. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC. 8. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals. 9. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of theoutput signal. 10. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device. 11. VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP(min) is AC limited for the E111 as a differential input as low as 50 mV will still produce full ECL levels at the output. 12. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP(min).
SEMTECH
T oday's Results...T omorrow's Vision
Low Voltage 1:9 Differential ECL/ PECL Clock Driver
SK10LVE111 SK100LVE111
Package Information
B
Y BRK -N-
0.007 (0.180) U
M
T L-MS N
M
S
0.007 (0.180) +
T L-MS N
S
D
Z
-L- -M-
VIEW D-D
W
D
+ X G1 0.010 (0.250)
S
T L-MS N
S
V 28 1
A Z R
0.007 (0.180) 0.007 (0.180)
M M
T L-MS N T L-MS N
S S
H
0.007 (0.180)
M
T L-MS N
S
K1
C E
VIEW S
+
+
G J G1 0.010 (0.250)
S
0.004 (0.100) -T- SEATING PLANE VIEW S
K F 0.007 (0.180)
M
T L-MS N
S
T L-MS N
S
INCHES
MILLIMETERS
MIN 12.32 12.32 4.20 2.29 0.33 MAX 12.57 12.57 4.57 2.79 0.48
NOTES: 1. Datums -L-, -M-, and -N- determined where top of lead shoulder exits plastic body at mold parting line. 2. DIM G1, true position to be measured at Datum -T-, Seating Plane. 3. DIM R and U do not include mold flash. Allowable mold flash is 0.010 (0.250) per side. 4. Dimensioning and tolerancing per ANSI Y14.5M, 1982. 5. Controlling Dimension: Inch. 6. The package top may be smaller than the package bottom by up to 0.012 (0.300). Dimensions R and U are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch betweeen the top and bottom of the plastic body. 7. Dimension H does not include Dambar protrusion or intrusion. The Dambar protrusion(s) shall not cause the H dimension to be greater than 0.037 (0.940). The Dambar intrusion(s) shall not cause the H dimension to be smaller than 0.025 (0.635).
DIM A B C E F G H J K R U V W X Y Z G1 K1
MIN 0.485 0.485 0.165 0.090 0.013
MAX 0.495 0.495 0.180 0.110 0.019
0.050 BSC 0.026 0.020 0.025 0.450 0.450 0.042 0.042 0.042 -2o 0.410 0.040 0.032 --0.456 0.456 0.048 0.048 0.056 0.020 10o 0.430 --
1.27 BSC 0.66 0.51 0.64 11.43 11.43 1.07 1.07 1.07 -2o 10.42 1.02 0.81 --11.58 11.58 1.21 1.21 1.42 0.50 10o 10.92 --

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